Logic Circuit Design Lab

PCECL308 - Logic Circuit Design Lab

EDA Playground

EDA playground
EDA playground allows you to edit, save, simulate, synthesize Verilog, VHDL and other HDLs from your web browser

• Getting started with EDA Playground
  -Addition operation simulation:Video tutorial
  -Basic gate simulation

AMD Vivado

We have AMD Vivado installed on HPC which can be accessed via ssh on the campus network. Thanks to Professor Lalu V. for installing and configuring AMD Vivado on HPC for lab use.

• Half Adder Simulation on Vivado: Video Tutorial
• Half Adder: Setting constraints using Vivado GUI
• Half Adder : Synthesis on Basys 3 using Vivado

ModelSim

ModelSim can be installed on PC (Windows/Linux) to simulate Verilog HDL or VHDL code

• Download ModelSim
• Getting started with ModelSim
  -Addition operation simulation:Video tutorial
  -Basic gate simulation using testbench & saving waveform

  ModelSim - Verilog Simulation

• Addition operation